System and method for performing multi-rank command scheduling in DDR SDRAM memory systems
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United States of America Patent
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Jun 2, 2009
Grant Date -
Nov 2, 2006
app pub date -
Apr 17, 2006
filing date -
Apr 18, 2005
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Abstract
bank activation constraint. A multi-rank DDRx memory system is also presented having at least two ranks of memory each having a number of banks and at least one memory controller configured for performing the hardware-implemented step of DRAM command scheduling for row access commands and column access commands. The step of command scheduling includes decoupling the row access commands from the column access commands; alternatively scheduling the decoupled row access commands to different ranks of memory; and group scheduling the decoupled column access commands to each bank of the number of banks of a given rank of the different ranks of memory.
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