Encapsulated power semiconductor assembly
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United States of America Patent
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N/A
Issued Date -
Nov 30, 2006
app pub date -
Apr 8, 2004
filing date -
Apr 9, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
The invention relates to an encapsulated power semiconductor assembly comprising a substrate consisting of an insulation material (ceramic), provided with a plurality of islands, which are composed of a thermal conductive material, in particular of partial surfaces of a metal layer. Power semiconductor chips are soldered onto said islands. Electric connections that run from the chips to the connecting elements are produced in the form of bonding pads on additional islands or in the form of wires and islands that are configured as printed conductors. The substrate and the chips are encapsulated, whereas the connection elements project beyond said encapsulation and the metallic underside of the substrate is exposed in order to be fastened to a heat sink.
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