Semiconductor wafer tester

Number of patents in Portfolio can not be more than 2000

United States of America Patent

SERIAL NO

11454674

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Abstract

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A test head is described for simultaneous test and/or burn-in of all of the chips on a semiconductor product wafer. The test head is suitable for testing wafers containing high powered chips such as microprocessors. A stimulus wafer is supported on a base with connections for power plus an interface to a test support computer. Attached to a first face of the stimulus wafer are all of the IC chips required to implement test circuits, power distribution, local memory, temperature sensing, and communication interfaces. The second face of the stimulus wafer is used to attach the first face of the product wafer using compliant connectors. The second face of the product wafer is available for cooling. Advanced flip chip connectors are preferably employed for assembling the chips on the stimulus wafer; they enable rework of any chips that prove defective. Embedded in the stimulus wafer are interconnection circuits plus through-wafer connectors. The product wafer is bumped at the I/O pads. In the stimulus wafer, fine pitch sockets are provided for attaching IC chips at the first face as well as for attaching the bumps of the product wafer at the second face; each socket comprises a well filled with conductive material and the bumps are inserted into the wells. The bumps may be solder balls, conductive pillars, stud bumps, or spring structures. By circulating a cooling fluid against the back side of the product wafer, high rate cooling of 20,000 watts or more can be dissipated in the product wafer.

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Patent Owner(s)

Patent OwnerAddress
SALMON TECHNOLOGIES LLC200 EAST DANA STREET #8 MOUNTAIN VIEW CA 94041

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Salmon, Peter C Mountain View, CA 74 1223

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