Method for Making a Semiconductor Device Including a Strained Superlattice Layer Above a Stress Layer

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United States of America Patent

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11457263

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Abstract

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A method for making a semiconductor device may include forming a stress layer, and forming a strained superlattice layer above the stress layer and including a plurality of stacked groups of layers. Each group of layers of the strained superlattice layer may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

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Patent Owner(s)

Patent OwnerAddress
MEARS TECHNOLOGIES INC189 WELLS AVE 3RD FLOOR NEWTON MA 02459

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kreps, Scott A Waltham, MA 39 3388
Mears, Robert J Wellesley, MA 119 6597

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