Memory controller, nonvolatile memory device, nonvolatile memory system and data writing method

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Jun 14, 2011
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Jan 11, 2007
app pub date
May 16, 2006
filing date
May 16, 2005

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Patent Owner	Address
PANASONIC CORPORATION	KADOMA-SHI OSAKA 571-8501

International Classification(s)

G06F:ELECTRIC DIGITAL DATA PROCESSING

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[Patents Count]

Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
Inoue, Manabu	Osaka, JP	253	3910
Izumi, Tomoaki	Osaka, JP	32	511
Kasahara, Tetsushi	Osaka, JP	24	469
Matsuno, Kiminori	Osaka, JP	22	450
Nakanishi, Masahiro	Kyoto, JP	87	1057
Tamura, Kazuaki	Osaka, JP	71	674
Toyama, Masayuki	Osaka, JP	58	981

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Memory controller, nonvolatile memory device, nonvolatile memory system and data writing method

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United States of America Patent

11434494

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PATENT NO	7962824
APP PUB NO	20070011581A1
SERIAL NO	11434494
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
June 14, 2011	US,7962824,B2 US7962824B2	GRANTED PATENT AS SECOND PUBLICATION
January 11, 2007	US,20070011581,A1 US20070011581A1	FIRST PUBLISHED PATENT APPLICATION

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11434494

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