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Abstract

A method for fabricating one or more devices, e.g., integrated circuits. The method includes providing a multi-layered substrate, which has a thickness of material (e.g., single crystal silicon) overlying a first debondable surface coupled to and overlying a second debondable surface. The second debondable surface is overlying an interface region of the multi-layered substrate. In a preferred embodiment, the thickness of material having a surface region. The method includes processing the surface region of the multi-layered substrate using one or more processes to form at least one device onto a portion of the surface region. The method includes forming a planarized upper surface region overlying the surface region of the thickness of material. The method includes joining the planarized upper surface region to a face of a handle substrate. In a preferred embodiment, the method includes processing the first debondable surface and the second debondable surface to change a bond strength from a first determined amount to a second determined amount, which is capable of debonding the first debondable surface from the second debondable surface. The method includes debonding the first debondable surface from the second debondable surface to release the thickness of material and the handle substrate.

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First Claim