Memory device configured to refresh memory cells in a power-down state

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7933161
APP PUB NO 20070047363A1
SERIAL NO

11509057

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Abstract

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A memory capable of preventing a memory cell from disappearance of data resulting from accumulated disturbances is obtained. This memory comprises a nonvolatile memory cell and a refresh portion for rewriting data in the memory cell. The refresh portion reads data from and rewrites data in the memory cell in a power-down state.

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Patent Owner(s)

Patent OwnerAddress
OL SECURITY LIMITED LIABILITY COMPANY160 GREENTREE DRIVE SUITE 101 DOVER DE 19904

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Matsushita, Shigeharu Katano, JP 28 268
Miyamoto, Hideaki Ogaki, JP 67 686

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