Integrated process for sputter deposition of a conductive barrier layer, especially an alloy of ruthenium and tantalum, underlying copper or copper alloy seed layer

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United States of America Patent

SERIAL NO

11511869

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Abstract

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A fabrication method and a product for the deposition of a conductive barrier or other liner layer in a vertical electrical interconnect structure. One embodiment includes within a a hole through a dielectric layer a barrier layer of RuTaN, an adhesion layer of RuTa, and a copper seed layer forming a liner for electroplating of copper. The ruthenium content is preferably greater than 50 at % and more preferably at least 80 at % but less than 95 at %. The barrier and adhesion layers may both be sputter deposited. Other platinum-group elements substitute for the ruthenium and other refractory metals substitute for the tantalum. Aluminum alloying into RuTa when annealed presents a moisture barrier. Copper contacts include different alloying fractions of RuTa to shift the work function to the doping type.

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Patent Owner(s)

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APPLIED MATERIALS INC3050 BOWERS AVENUE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chung, Hua San Jose, CA 203 14401
Gopalraja, Praburam San Jose, CA 101 3789
Tanaka, Yoichiro Santa Clara, CA 73 1756
Tang, Xianmin San Jose, CA 168 2484
Wang, Jenn Yue Fremont, CA 7 168
Wang, Rongjun Cupertino, CA 129 1811
Wang, Wei D San Jose, CA 52 1866
Yu, Jick M San Jose, CA 29 1560

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