Semiconductor device including a front side strained superlattice layer and a back side stress layer

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United States of America Patent

SERIAL NO

11534796

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Abstract

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A semiconductor device may include a semiconductor substrate having front and back surfaces, a strained superlattice layer adjacent the front surface of the semiconductor substrate and comprising a plurality of stacked groups of layers, and a stress layer on the back surface of the substrate and comprising a material different than the semiconductor substrate. Each group of layers of the strained superlattice layer may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

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Patent Owner(s)

Patent OwnerAddress
MEARS TECHNOLOGIES INC189 WELLS AVE 3RD FLOOR NEWTON MA 02459

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Rao, Kalipatnam Vivek Grafton, MA 23 1607

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