Data processing device and method
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United States of America Patent
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Issued Date -
Apr 12, 2007
app pub date -
Jun 17, 2004
filing date -
Jun 17, 2003
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
The present invention relates to a method of coupling at least one (conventional) unit processing data in a sequential manner, e.g. a CPU, von-Neumann-Processor and/or microcontroller, the (conventional) unit for data processing comprising an instruction pipeline, and an array for processing data comprising a plurality of data processing cells, e.g. a preferably coarse grain and/or preferably runtime reconfigurable data processor, FPGA, DFP, DSP, XPP or chaemeleon-technology-like data processing fabric, wherein the array is coupled to the instruction pipeline.
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