Methods and systems for implementing dummy fill for integrated circuits
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United States of America Patent
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Jul 13, 2010
Grant Date -
May 3, 2007
app pub date -
Dec 18, 2006
filing date -
Jun 7, 2002
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Abstract
A method and system are described to reduce process variation as a result of the electrochemical deposition (ECD), also referred to as electrochemical plating (ECP), and chemical mechanical polishing (CMP) processing of films in integrated circuit manufacturing processes. The described methods use process variation and electrical impact to direct the insertion of dummy fill into an integrated circuit.
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