Semiconductor device manufacturing method

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United States of America Patent

APP PUB NO 20070134898A1
SERIAL NO

11581002

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Abstract

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After a Ni film is deposited on a substrate on which a gate silicon layer is formed, a mask is formed above the gate silicon layer. Then, the Ni film is etched so as to leave a part of the Ni film which is located on the gate silicon layer. This restricts sideways supply of Ni present on the sides of the gate silicon layer. Thereafter, thermal treatment is performed to silicidate the gate silicon layer entirely.

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Patent Owner(s)

Patent OwnerAddress
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD1006 OAZA KADOMA KADOMASHI OSAKA 571-8

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aida, Kazuhiko Chiba, JP 19 313
Hirase, Junji Osaka, JP 70 554
Kotani, Naoki Hyogo, JP 33 366
Okazaki, Gen Hyogo, JP 17 153
Sebe, Akio Osaka, JP 14 122
Takeoka, Shinji Osaka, JP 69 389

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