Mixer circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20070142017A1
SERIAL NO

10560398

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A mixer circuit is configured using a CMOS transistor (800), comprising a p-channel transistor (840A) and an n-channel transistor (840B) in which semiconductor substrates (810A, 810) with at least two crystal planes and a gate insulator (820A) formed on at least two of the crystal planes on the semiconductor substrate are comprised and the channel width of a channel formed in the semiconductor substrate along with the gate insulator is represented by summation of each of the channel widths of channels individually formed on said at least two crystal planes. Such a configuration allows reduction of 1/f noise, DC offset generated in output signals due to variation in electrical characteristics of a transistor element, and signal distortion based on the channel length modulation effect.

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Patent Owner(s)

Patent OwnerAddress
OHMI TADAHIRO1-17-301 KOMEGABUKURO 2-CHOME AOBA-KU SENDAI-SHI MIYAGI-KEN 980-0813
NIIGATA SEIMITSU CO LTD5-13 NISHISHIROCHO 2-CHOME JOETSU-SHI NIIGATA 943-0834

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Miyagi, Hiroshi Joetsu, JP 103 310
Nishimuta, Takefumi Kariya, JP 8 15
Ohmi, Tadahiro Sendai, JP 798 13074
Sugawa, Shigetoshi Sendai, JP 206 5149
Teramoto, Akinobu Sendai, JP 114 769

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