Tightly coupled scalar and boolean processor with result vector subunit controlled by instruction flow
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United States of America Patent
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Oct 1, 2013
Grant Date -
Jul 19, 2007
app pub date -
Jan 15, 2007
filing date -
Jun 15, 1998
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Abstract
Methods and apparatus relating to a tightly coupled scalar and Boolean processor are described. In an embodiment, a Boolean unit may include a result vector subunit. The result vector subunit may be controlled by an instruction flow that is managed by a scalar unit. Other embodiments are also disclosed.
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