System and method for synthesis reuse

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United States of America Patent

PATENT NO 7673259
SERIAL NO

11324004

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Abstract

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A method of synthesis of multiple implementations of a design is provided comprising: translating a model of the design to a first output model compliant with first constraints; and translating the model of the design to a second output model compliant with second constraints.

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Patent Owner(s)

  • CADENCE DESIGN SYSTEMS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kondratyev, Alex Campbell, US 8 128
Lavagno, Luciano Berkeley, US 19 248
Watanabe, Yosinori El Cerrito, US 16 100

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