Copper electrodeposition in microelectronics
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United States of America Patent
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Issued Date -
Aug 2, 2007
app pub date -
Feb 2, 2006
filing date -
Feb 2, 2006
priority date (Note) -
Abandoned
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Abstract
An electrolytic plating method and composition for electrolytically plating Cu onto a semiconductor integrated circuit substrate having submicron-sized interconnect features. The composition comprises a source of Cu ions and a suppressor compound comprising polyether groups. The method involves rapid bottom-up deposition at a superfill speed by which Cu deposition in a vertical direction from the bottoms of the features to the top openings of the features is greater than Cu deposition on the side walls.
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