Integrated Circuit Apparatus And Method for High Throughput Signature Based Network Applications

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United States of America Patent

SERIAL NO

11539603

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Abstract

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An architecture for an integrated circuit apparatus and method that allows significant performance improvements for signature based network applications. In various embodiments the architecture allows high throughput classification of packets into network streams, packet reassembly of such streams, filtering and pre-processing of such streams, pattern matching on header and payload content of such streams, and action execution based upon rule-based policy for multiple network applications, simultaneously at wire speed. The present invention is improved over the prior art designs, in performance, flexibility and pattern database size.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barrie, Robert Matthew Double Bay, AU 24 1216
de, Jong Nicholas Bondi Junction, AU 5 125
Gould, Stephen Killara, AU 51 1336
Williams, Darren Newtown, AU 29 1213

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