Structure of stacked integrated circuits and method for manufacturing the same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20070210434A1
SERIAL NO

11371880

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The structure of stacked integrated circuits includes a substrate having an upper surface formed with first electrodes, and a lower surface formed with second electrodes. A lower integrated circuit is formed with bonding pads, and is located on the upper surface of the substrate. First adhered glue is coated on the periphery of the lower integrated circuit to form a plurality of points having same height. Second adhered glue is coated on the lower integrated circuit, and is located on the periphery of the first adhered glue. An upper integrated circuit has bonding pads, and is arranged on the lower integrated circuit, and is supported and is adhered by the first adhered glue and the second adhered glue. A plurality of wirings are electrically connected the bonding pads of the lower integrated circuit and the upper integrated circuit to the first electrodes of the substrate. And a compound layer is encapsulated on the upper integrated circuit and the lower integrated circuit.

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Patent Owner(s)

Patent OwnerAddress
KINGPAK TECHNOLOGY INCHSIN-CHU HSIEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hsin, Chung Hsien Hsinchu Hsien, TW 36 133

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