Importance

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Abstract

A method to form a narrow trench within a semiconductor substrate includes exemplary steps of: (a) A CVD layer such as SiO.sub.2 represented as 'CVD1' is deposited on top of a semiconductor surface followed by a different type of CVD layer such as SiON or Si.sub.3N.sub.4 (represented by 'CVD2' deposited on top of 'CVD1'. (b) A 0.2 um trench is formed by partially etching a trench in the CVD deposited layers with a substantial 'CVD1' thickness left in order to act as a hard mask layer in the later stage. (c) A thin layer of polysilicon is then deposited in the trench such that the polysilicon covers conformally on the trench wall, trench bottom and on top of the 'CVD2' layer. (d) The polysilicon at the trench bottom is then blanket etched to expose the 'CVD1' substrate again. (e) The remaining 'CVD1' substrate, which is exposed now at the trench bottom, will go through a 'CVD1' etching process with good selectivity to Polysilicon and 'CVD2' in order to expose the semiconductor substrate at trench bottom. (f) The narrow 'CVD1' trench, which is now formed, will go through another etching process to etch the semiconductor substrate with the narrow 'CVD1' trench acting as a hard mask. In preferred embodiments, the method of the present invention is used to manufacture trenched MOSFET device.

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First Claim