Method and apparatus for identifying paths having appropriate lengths for fault simulation

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United States of America Patent

PATENT NO 8166380
APP PUB NO 20070245197A1
SERIAL NO

11521173

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Abstract

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A fault analysis apparatus includes: an extracting unit that extracts a segment including a point of fault from a plurality of paths in a target circuit; a detecting unit that detects a candidate path that extends, via the segment, from an upstream circuit element to a downstream circuit element; a judging unit that judges whether length of the candidate path is longer than a predetermined length; and a determining unit that determines whether to determine the candidate path as a target path to be subjected to a fault simulation based on a result of judgment.

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Patent Owner(s)

  • FUJITSU LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hiraide, Takahisa Kawasaki, JP 11 121

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