Data access target predictions in a data processing system

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United States of America Patent

PATENT NO 7900019
APP PUB NO 20070255927A1
SERIAL NO

11414547

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Abstract

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A data processing apparatus having a plurality of memories is provided in which address generation logic (109) outputs to at least one of the plurality of memories a target memory address corresponding to the data to be accessed. Target memory prediction logic (113) outputs a prediction indicating in which one of the plurality of memories a target data is stored. The target memory prediction logic (113) outputs the prediction in the same processing cycle as the output of the target memory address by the address generation logic (109). An associated method is also provided.

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Patent Owner(s)

  • ARM LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hart, David Kevin Cambridge, GB 4 51
Osmany, Javed Cambridge, GB 1 3
Rose, Andrew Christopher Cambridge, GB 53 939
Vasekin, Vladimir Cambridge, GB 31 299

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