Parallel condition code generation for SIMD operations
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United States of America Patent
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Jul 21, 2009
Grant Date -
Nov 1, 2007
app pub date -
Apr 28, 2006
filing date -
Apr 28, 2006
priority date (Note) -
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Abstract
A processing system and method performs data processing operations in response to a single data processing instruction. At least two registers store data. First control circuitry compares data in respective corresponding fields of the at least two registers to create a plurality of condition values. Second control circuitry performs one or more predetermined logic operations on less than all of the plurality of condition values and on more than one condition value of the plurality of condition values to generate a condition code for each of the one or more predetermined logic operations. A condition code register stores the condition code for each of the one or more predetermined logic operations.
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