Digital drive architecture for flat panel displays
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United States of America Patent
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Issued Date -
Nov 15, 2007
app pub date -
May 24, 2006
filing date -
May 25, 2005
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
This present invention describes a new digital drive concept for flat panel displays where an all-digital drive is used to write data to pixels, which establish the gray scale for each pixel. In addition the invention integrates the all-digital drive with an optical sensor feedback circuit in the pixel without having to add an extra data line for the pixel sensor. Also discussed is a novel unique pulse timing system, where the positioning of the pulse in time has 12 bit accuracy using 8 bit gray scale data and a phase delay system (delay locked loop, DLL).
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