Method and apparatus for controlling phase of a clock signal
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United States of America Patent
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Issued Date -
Nov 15, 2007
app pub date -
Aug 7, 2006
filing date -
May 10, 2006
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A method and corresponding apparatus are disclosed for controlling the phase of a second clock signal from (i) a first clock signal of different frequency and (ii) a synchronization signal. One example embodiment recovers a first clock signal from a bus carrying data and detects a synchronization signal. Both the first clock signal and the synchronization signal are provided to a clock generator, which then generates the second clock signal with a phased based on the first clock signal and the synchronization signal. The use of the example embodiment is a low cost way to easily control the phase of a second clock signal with minimal added components and/or additional signal processing.
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