Shallow trench isolation (STI) with trench liner of increased thickness
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United States of America Patent
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Issued Date -
Nov 22, 2007
app pub date -
May 18, 2006
filing date -
May 18, 2006
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
Improved shallow trench isolation (STI) techniques are provided for semiconductor devices. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a substrate, a first trench in the substrate, and a second trench in the substrate. A first silicon dioxide liner substantially lines the first trench. A second silicon dioxide liner substantially lines the second trench, wherein the second silicon dioxide liner has a thickness greater than a thickness of the first silicon dioxide liner. A silicon nitride liner is on the first silicon dioxide liner in the first trench but not on the second silicon dioxide liner in the second trench. A dielectric material fills the first and second trenches.
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