Air cavity wafer level packaging assembly and method
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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N/A
Issued Date -
Nov 29, 2007
app pub date -
May 26, 2006
filing date -
May 26, 2006
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A wafer level packaging method and assembly for packaging a wafer segment having active and inactive areas. A sacrificial layer is provided over the wafer segment. Then the sacrificial layer is modified to create a sacrificial structure having sacrificial layer openings which expose inactive areas. A cover layer is then deposited over the sacrificial structure such that the cover layer encloses the sacrificial structure and fills the sacrificial layer openings. The cover layer is modified to create a cover structure having cover layer openings that expose an inactive area of the wafer segment and through which the sacrificial structure can be removed. The sacrificial structure is removed and then enclosed with a sealing layer such that the sealing layer fills the cover layer openings in the cover structure. The cover structure and the sealing layer form the packaging assembly for the wafer segment.
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