Level Shifter and Voltage Converting Device
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United States of America Patent
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Issued Date -
Feb 7, 2008
app pub date -
Aug 31, 2005
filing date -
Sep 3, 2004
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A level shifter voltage contributing to a simplified interface and realizing a reduced power consumption and a voltage supplying device using such a level shifter are provided. A level shifter (1) receives an input data (Din) having a voltage of 0V (zero) and a clock signal (CLK) to shift said voltage of 0V to 5V. The level shifter (1) comprises a first means for supplying a voltage of Vdd(=5V) to a node (N1) and a second means for supplying a voltage of Vss(=0V) to the node (N1). The second means operates so as to block a supply of the voltage of Vss to the node (N1) when the first means supplies the voltage of Vdd to the node (N1).
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