Power saving system and method for use with a plurality of memory circuits
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United States of America Patent
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Aug 25, 2009
Grant Date -
Feb 7, 2008
app pub date -
Jul 31, 2006
filing date -
Jul 31, 2006
priority date (Note) -
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status (Latency Note)
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Abstract
A power saving system and method are provided. In use, at least one of a plurality of memory circuits is identified that is not currently being accessed. In response to the identification of the at least one memory circuit, a power saving operation is initiated in association with the at least one memory circuit.
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