SEMICONDUCTOR DEVICE INCLUDING A GATE ELECTRODE HAVING A POLYMETAL STRUCTURE

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United States of America Patent

APP PUB NO 20080061386A1
SERIAL NO

11853851

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Abstract

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A semiconductor device includes a gate electrode including a polysilicon layer, a tungsten silicide layer, a tungsten nitride layer, and a tungsten layer, which are arranged in this order as viewed from a silicon substrate. The polysilicon layer is doped with phosphor, and the tungsten silicide layer is doped with nitrogen. The polysilicon layer is additionally doped with nitrogen in the top portion thereof.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
ELPIDA MEMORY, INC.TOKYO217

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Taguwa, Tetsuya Tokyo, JP 25 163

Cited Art Landscape

Patent Info (Count) # Cites Year
 
U.S. BANK NATIONAL ASSOCIATION (1)
* 2005/0062,114 Method for reducing the effective thickness of gate oxides by nitrogen implantation and anneal 0 2004
 
PS4 LUXCO S.A.R.L. (1)
* 6800543 Semiconductor device having a low-resistance gate electrode 12 2002
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (1)
* 2014/0332,874 SEMICONDUCTOR DEVICES 0 2014
 
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION (1)
* 9147746 MOS transistors and fabrication method thereof 1 2013
 
SANDISK TECHNOLOGIES LLC (1)
* 9793139 Robust nucleation layers for enhanced fluorine protection and stress reduction in 3D NAND word lines 0 2016
 
APPLIED MATERIALS, INC. (1)
9583349 Lowering tungsten resistivity by replacing titanium nitride with titanium silicon nitride 0 2014
 
HYNIX SEMICONDUCTOR INC. (2)
* 7989281 Method for manufacturing dual gate in semiconductor device 0 2008
* 2009/0093,097 Method for Manufacturing Dual Gate in Semiconductor Device 2 2008
* Cited By Examiner