Method and system for synchronizable E-VSB enhanced data interleaving and data expansion

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United States of America Patent

PATENT NO 7787491
APP PUB NO 20080063089A1
SERIAL NO

11510331

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Abstract

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Methods and systems for a synchronizable E-VSB enhanced data interleaving and data expansion are disclosed. Aspects of one method may include a packet processor that may generate valid output when a portion of the packet processor may initially contain invalid data. The packet processor may generate the valid data after detecting that storage elements within an interleaver integrated within the packet processor may be filled with valid data received from input, and that a byte output by the interleaver may be a first byte among the bytes in the interleaver that may be part of a new VBS field.

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Patent Owner(s)

Patent OwnerAddress
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE LTDSINGAPORE SINGAPORE SINGAPORE CITY SINGAPORE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Wu-Hsiang Irvine, US 1 66

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