Stacked die semiconductor device having circuit tape

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7659608
SERIAL NO

11532387

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Abstract

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A stacked die semiconductor package includes a first integrated circuit chip, a first circuit tape coupled to the first integrated circuit chip, a second integrated circuit chip coupled to the first circuit tape, and at least one component coupled to the first circuit tape. The at least one component may include one or more passive components, one or more active components, or a combination of passive and active components. The stacked die semiconductor package can also include a second circuit tape coupled to the second integrated circuit chip and a third integrated circuit chip coupled to the second circuit tape. The stacked die semiconductor package can also include an encapsulant.

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Patent Owner(s)

  • STATS CHIPPAC PTE. LTE.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cablao, Philip Lyndon R Singapore, SG 2 3
Espiritu, Emmanuel A Singapore, SG 15 477
Filoteo,, Jr Dario S Singapore, SG 22 150
Merilo, Leo A Singapore, SG 11 132

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