Voltage regulator in a non-volatile memory device
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United States of America Patent
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May 13, 2008
Grant Date -
Apr 17, 2008
app pub date -
Oct 16, 2006
filing date -
Oct 16, 2006
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Abstract
System and method for controlling voltage in a non-volatile memory system is provided. The system includes a voltage regulator that monitors an output voltage (VDD) and a mirror voltage (Vmirror). When the voltage VDD is greater than the voltage Vmirror beyond a threshold value, a control signal turns off a control transistor, which prevents the voltage VDD to increase beyond a certain value. The method includes comparing an output voltage (VDD) with a mirror voltage (Vmirror); and generating a control signal to turn off a control transistor if the voltage VDD is greater than the voltage Vmirror.
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