Memory system including flash memory and merge method thereof

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20080098159A1
SERIAL NO

11644833

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Abstract

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A memory system which includes a host and a data storage device which is configured to receive an invalidated block address and to interrupt a merge operation for an invalidated block.

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTDGYEONGGI DO SOUTH KOREA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lee, Shea-Yun Seoul, KR 16 426
Park, Chan-Ik Seoul, KR 58 2183
Song, Dong-Hyun Yongin-si, KR 29 643

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