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Abstract

A method of performing electrochemical deposition is provided to minimize overburden. A constant plating voltage (and a variable plating current) is applied across a semiconductor structure (e.g., patterned dielectric layer) and a metal electrode, which are both submerged in an electrolyte that contains both suppressor and accelerator molecules. The constant plating voltage is selected such that the suppressor molecules are predominantly active on the flat upper surface of the patterned dielectric layer, and the accelerator molecules are predominantly active within the patterned features of the patterned dielectric layer. As a result, metal is deposited at a relatively high rate within the patterned features, and at a relatively low rate on the flat upper surface areas of the patterned dielectric layer. Consequently, the patterned features are filled with metal before significant overburden can be formed over the flat upper surface areas of the patterned dielectric layer.

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First Claim