System and method for reducing command scheduling constraints of memory circuits

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United States of America Patent

PATENT NO 9542353
APP PUB NO 20080120443A1
SERIAL NO

11929225

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Abstract

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A memory circuit system and method are provided. An interface circuit is capable of communication with a plurality of memory circuits and a system. In use, the interface circuit is operable to interface the memory circuits and the system for reducing command scheduling constraints of the memory circuits.

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Patent Owner(s)

Patent OwnerAddress
GOOGLE LLC1600 AMPHITHEATRE PARKWAY MOUNTAIN VIEW CA 94043

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Rajan, Suresh Natarajan San Jose, US 80 11498
Schakel, Keith R San Jose, US 64 9659
Smith, Michael John Sebastian Palo Alto, US 79 10889
Wang, David T San Jose, US 97 11981
Weber, Frederick Daniel San Jose, US 55 9197

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