Importance

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Abstract

Methods are provided for manufacturing a wiring circuit element or wiring board in which a set of rough wiring patterns are formed by selectively etching a metal layer of a patternable member which includes a carrier layer having a rough surface and a thin rough-surfaced etch stop layer between the carrier layer and the metal layer. The etch stop layer and wiring patterns are joined to an insulating layer such that the wiring patterns adhere to the insulating layer and the insulating layer acquires a rough surface. Thereafter, the carrier layer and the etch stop layer are removed, after which openings are formed in the insulating layer in contact with at least some of the wiring patterns. A layer of metal is electrolessly plated onto the rough major surface of the insulating layer, and then a conductive wiring pattern is selectively electroplated over the electrolessly plated layer to form plated openings that interconnect at least some of the wiring patterns.

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First Claim