Split gate formation with high density plasma (HDP) oxide layer as inter-polysilicon insulation layer

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United States of America Patent

SERIAL NO

11644344

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Abstract

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This invention discloses method of for manufacturing a trenched semiconductor power device with split gate filling a trench opened in a semiconductor substrate wherein the split gate is separated by an inter-poly insulation layer disposed between a top and a bottom gate segments. The method further includes a step of forming the inter-poly layer by applying a RTP process after a HDP oxide deposition process to bring an etch rate of the HDP oxide layer close to an etch rate of a thermal oxide.

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Patent OwnerAddress
ALPHA & OMEGA SEMICONDUCTOR LTDCANNON'S COURT 22 VICTORIA STREET HAMILTON HM12

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Hong Cupertino, CA 113 1303
Hebert, Francois San Mateo, CA 178 3168
Hu, Yong-Zhong Cupertino, CA 16 19
Lou, Yingying Shanghai, CN 6 32
Pan, Mengyu Shanghai, CN 7 36
Tai, Sung-Shan San Jose, CA 51 801
Wang, Yu Fremont, CA 1261 7108

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