Responding to a storage processor failure with continued write caching

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United States of America Patent

PATENT NO 7849350
SERIAL NO

11529124

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Abstract

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A technique responds to a storage processor failure. The technique involves performing write-back caching operations using a cache of a first storage processor, and mirroring data from the cache of the first storage processor to a cache of a second storage processor. The technique further involves, after of a failure of the second storage processor in which the second storage processor becomes unavailable, continuing to perform write-back caching operations using the cache of the first storage processor while the second storage processor remains unavailable. A cache controller is capable of being modified so that any write data in the cache of the first storage processor persists if the first storage processor encounters a failure thus preventing loss of the cached write data.

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Patent Owner(s)

  • EMC IP HOLDING COMPANY LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Buckley, Bill Brighton, US 3 30
French, David Grafton, US 46 198
Spang,, IV H Austin Hopkinton, US 4 36
Sullivan, Douglas Hopkinton, US 23 354
Yellen, Matt Worcester, US 1 23

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