STRUCTURE AND METHOD FOR FORMING ASYMMETRICAL OVERLAP CAPACITANCE IN FIELD EFFECT TRANSISTORS
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United States of America Patent
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app pub date -
Apr 3, 2008
filing date -
Oct 7, 2005
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Abstract
A method for forming asymmetric spacer structures for a semiconductor device includes forming a spacer layer over at least a pair of adjacently spaced gate structures disposed over a semiconductor substrate. The gate structures are spaced such that the spacer layer is formed at a first thickness in a region between the gate structures and at a second thickness elsewhere, the second thickness being greater than said first thickness. The spacer layer is etched so as to form asymmetric spacer structures for the pair of adjacently spaced gate structures.
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