Stackable semiconductor package having metal pin within through hole of package

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7656031
APP PUB NO 20080185708A1
SERIAL NO

11808129

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Importance

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Abstract

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The present invention provides a stackable semiconductor having an interconnect board for providing electrical interconnections, the package includes a plurality of solders disposing onto the interconnect board; and a conducting metal pin passing through each solder and the interconnect board, the metal pins having at least one end disposes on the semiconductor package, wherein when a plurality of the stackable semiconductor packages are stacked together, the exposed end of the corresponding conducting pins are bonded together. A method of manufacturing the same is also provided.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
BRIDGE SEMICONDUCTOR CORPORATIONTAIPEI88

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Cheng-Chung Taipei, TW 55 390
Lin, Charles W C Taipei County, TW 176 2102
Tan, Chin Hock Singapore, SG 1 10
Wang, Chia-Chung Hsinchu, TW 127 560

Cited Art Landscape

Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (1)
* 2006/0252,180 Method for a low profile multi-IC chip package connector 6 2006
 
GREATBATCH, LTD. (NEW YORK CORPORATION) (1)
* 2006/0259,093 HERMETIC FEEDTHROUGH TERMINAL ASSEMBLY WITH WIRE BOND PADS FOR HUMAN IMPLANT APPLICATIONS 64 2006
 
BEYOND BLADES LTD. (1)
* 2008/0253,085 3-Dimensional Multi-Layered Modular Computer Architecture 58 2006
 
INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE (1)
* 2006/0091,542 Flip chip package including a heat spreader having an edge with a recessed edge portion and method of making the same 20 2004
 
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. (1)
* 2007/0290,376 Integrated circuit (IC) package stacking and IC packages formed by same 192 2006
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (1)
* 2015/0243,640 SEMICONDUCTOR DEVICE 0 2015
 
STATS CHIPPAC PTE. LTE. (5)
* 7863755 Package-on-package system with via Z-interconnections 8 2008
* 2009/0236,752 PACKAGE-ON-PACKAGE SYSTEM WITH VIA Z-INTERCONNECTIONS 29 2008
* 8080885 Integrated circuit packaging system with multi level contact and method of manufacture thereof 1 2008
* 2010/0123,251 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI LEVEL CONTACT AND METHOD OF MANUFACTURE THEREOF 3 2008
8258008 Package-on-package system with via z-interconnections and method for manufacturing thereof 3 2010
 
NXP B.V. (1)
* 8729679 Shielding silicon from external RF interference 2 2012
 
APPLE INC. (1)
9589936 3D integration of fanout wafer level packages 0 2015
 
ROHM CO., LTD. (2)
* 9484282 Resin-sealed semiconductor device 0 2008
* 2009/0184,412 RESIN-SEAL TYPE SEMICONDUCTOR DEVICE 8 2008
 
KABUSHIKI KAISHA TOSHIBA (2)
* 7932605 Semiconductor device and manufacturing method therefor 3 2007
* 2008/0017,973 Semiconductor device and manufacturing method therefor 1 2007
 
SK HYNIX INC. (2)
* 8823158 Semiconductor package and stacked semiconductor package having the same 9 2012
9070691 Semiconductor package and stacked semiconductor package having the same 0 2014
 
HYNIX SEMICONDUCTOR INC. (1)
* 2013/0026,651 SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE HAVING THE SAME 1 2012
 
FUJI ELECTRIC CO., LTD. (1)
* 9305910 Semiconductor device 0 2015
* Cited By Examiner

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
7.5 Year Payment $3600.00 $1800.00 $900.00 Aug 2, 2017
11.5 Year Payment $7400.00 $3700.00 $1850.00 Aug 2, 2021
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