Device, system and method for controlling memory operations
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United States of America Patent
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N/A
Issued Date -
Aug 7, 2008
app pub date -
Feb 2, 2007
filing date -
Feb 2, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A device, system and method for controlling memory operations are disclosed. In an embodiment, data is received at one of multiple slave devices in an integrated circuit. The data is received from at least one bus in a multiple layer bus and is provided to a memory controller. The data is stored in a selected one of multiple memory banks. The memory banks are interleaved such that a first memory address resides on a first memory bank and a next memory address resides on a second memory bank.
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