Electrostatic discharge (ESD) protection device and method therefor

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United States of America Patent

APP PUB NO 20080198516A1
SERIAL NO

11706232

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Abstract

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A method and device for providing electrostatic discharge (ESD) protection are disclosed. The method uses the gate-controlled conductivity of field n-channel metal-oxide-semiconductor field effect transistor (field NMOSFET), wherein considerable ESD current can be conducted away when any ESD event beyond range of operation voltage, unlike PMOS ESD protection which is to be turned on at negative voltage. Instead of the traditional two-stage ESD protection (using one ESD protection between open drain output and V.sub.SS and the other ESD protection between V.sub.DD and V.sub.SS), the device can be directly used between open drain output and power source V.sub.DD for the wide range of operation voltage. Unlike the floating-gate field NMOS using punch through current for ESD protection, a controllable triggered voltage by changing the gate threshold voltage supports the device to be a robust ESD protection.

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Patent Owner(s)

Patent OwnerAddress
VASTVIEW TECHNOLOGY INC4F NO 5 TECHNOLOGY RD HSIN-CHU SCIENCE BASED INDUSTRIAL PARK HSIN-CHU HSIEN R O C

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chi, Hung-Chi Hsinchu, TW 1 0
Fang, Hui-Chia Hsinchu, TW 1 0
Shen, Yuh-Ren Hsinchu, TW 43 637

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