Battery capacity monitoring system and method of displaying capacity thereof
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United States of America Patent
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Issued Date -
Sep 4, 2008
app pub date -
Mar 2, 2007
filing date -
Mar 2, 2007
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A system for monitoring the battery capacitor is disclosed. The system comprises an ADC (analog to digital converter), a CPU, a ROM, a clock generator, a SMbus (smart management bus) interface. A series of RTC interrupt signals are generated by the clock generator and feeds to the CPU. When the CPU receives a RTC interrupt, the CPU runs a program in said ROM to calculate the remaining capacity of the battery and stores it into register or RAM according to the digital signal outputs from the ADC, which converts an analog signal of the battery into a digital signal. The SM bus interface then fetches the calculated results from the CPU and displays them by LED in terms of lighting, dark and flashing.
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