Identifying Radiation-Induced Inversions
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United States of America Patent
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Issued Date -
Sep 25, 2008
app pub date -
Mar 23, 2007
filing date -
Mar 23, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A semiconductor layout design analyzer alerts a user of areas in a semiconductor layout design that may be candidates for radiation induced inversion. The analyzer includes means for gathering information, means for identifying, and means for alerting the user. The means for gathering gathers, from the layout design, placement information for thick oxide, low-doped p-type single crystal silicon, and n-type silicon. The means for identifying identifies, in the layout design, thick oxide overlaying low-doped p-type single crystal silicon and abutting n-type silicon. The means for alerting the user alerts the user of the identified areas of thick oxide.
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