METHOD AND DEVICE FOR DATA INTEGRITY CHECKING
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United States of America Patent
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app pub date -
May 5, 2008
filing date -
Jan 8, 2004
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Abandoned
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Abstract
The present invention relates to high speed datapaths, sometimes including mixed digital and analog voltage signals. In particular, it relates to error checking strategies for large data volumes, in digital and/or analog domains and to analog signal patterns that accelerate charge loading of micromirrors in an SLM. Particular aspects of the present invention are described in the claims, specification and drawings.
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