System and method for simultaneous optimization of multiple scenarios in an integrated circuit design

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United States of America Patent

APP PUB NO 20080244476A1
SERIAL NO

11732384

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Abstract

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The present invention provides a system and method for concurrently performing analysis and optimization of an integrated circuit (IC) design in multiple scenarios. The system is based on a distributed computing model, where any optimization change introduced in one scenario is immediately tested in all other scenarios. This ensures that modifications made to the design do not affect other scenarios. The invention significantly reduces the execution time of the optimization and signoff flows in the design of ICs. In addition, the computing means required for simultaneously testing multiple scenarios are standard and affordable.

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Patent Owner(s)

Patent OwnerAddress
ATHENA DESIGN SYSTEMS INC125 CAMBRIDGEPARK DRIVE CAMBRIDGE MA 02140

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fotakis, Dimitris K Saratoga, CA 4 23
Hembruch, Mattias Fremont, CA 2 18
Kiani, Payam San Jose, CA 1 14

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