Method of Forming Phase Change Memory Cell With Reduced Switchable Volume
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United States of America Patent
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Issued Date -
Oct 30, 2008
app pub date -
Apr 30, 2007
filing date -
Apr 30, 2007
priority date (Note) -
Abandoned
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Abstract
A memory cell is fabricated by forming a dielectric layer and patterning a hole in the dielectric layer. Patterning the hole is accomplished at least in part by contacting the dielectric layer with a catalytic material in the presence of a reactant under conditions effective to remove those areas of the dielectric layer in contact with the catalytic material. A phase change feature is then formed in contact with the dielectric layer such that a portion of the phase change feature at least partially fills the hole in the dielectric layer. At least a portion of the patterned dielectric layer remains in the ultimate memory cell.
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