INTER-CONNECTING STRUCTURE FOR SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF THE SAME
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United States of America Patent
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Issued Date -
Jan 8, 2009
app pub date -
Jul 6, 2007
filing date -
Jul 6, 2007
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
An interconnecting structure for a semiconductor die assembly, comprising: a substrate with pre-formed wiring circuit formed therein; a die having contact pads on an active surface; an adhesive material formed over the substrate to adhere the die over the substrate, wherein the substrate includes a via through the substrate and the adhesive material; and conductive material refilled into the via to couple the contact pads of the die to the wiring circuit of the substrate.
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