Electrical device and method for fabricating the same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7795090
APP PUB NO 20090011569A1
SERIAL NO

12211815

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Abstract

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A method of fabricating self-aligned recess utilizing asymmetric poly spacer is disclosed. A semiconductor substrate having thereon a first pad layer and second pad layer is provided. A plurality of trenches is embedded in a memory array region of the semiconductor substrate. Each of the trenches includes a trench top layer that extrudes from a main surface of the semiconductor substrate. Asymmetric poly spacer is formed on one side of the extruding trench top layer and is used, after oxidized, as a mask for forming a recess in close proximity to the trenches.

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Patent Owner(s)

Patent OwnerAddress
NANYA TECHNOLOGY CORPHWA-YA TECHNOLOGY PARK 669 FUHSING 3 RD KUEISHAN TAO-YUAN HSIEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cheng, Chien-Li Hsin-Chu, TW 21 149
Lee, Chung-Yuan Tao-Yuan, TW 68 722
Lee, Pei-Ing Chang-Hua Hsien, TW 32 429
Lin, Shian-Jyh Taipei County, TW 85 491

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