PROCESS FOR MANUFACTURING AN ARRAY OF CELLS INCLUDING SELECTION BIPOLAR JUNCTION TRANSISTORS WITH PROJECTING CONDUCTION REGIONS
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United States of America Patent
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Issued Date -
Jan 15, 2009
app pub date -
Jul 8, 2008
filing date -
Jul 9, 2007
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A process manufactures an array of cells in a body of semiconductor material wherein a common conduction region of a first conductivity type and a plurality of shared control regions, of a second conductivity type, are formed in the body. The shared control regions extend on the common conduction region and are laterally delimited by insulating regions. Then, a grid-like layer is formed on the body to delimit a first plurality of empty regions directly overlying the body and conductive regions of semiconductor material and the first conductivity type are formed by filling the first plurality of empty regions, each conductive region forming, together with the common conduction region and an own shared control region, a bipolar junction transistor.
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